FPGA IP Design Engineer Intern
at Altera
About the Role
Design and verify FPGA NoC IP cores
About Altera
Intel subsidiary; FPGA IP cores and tooling
Full Description
Job Details Job Description: Altera's NoC functional team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Intel's FPGA devices. These solutions are provided as highly configurable intellectual property IP cores that are fully integrated with Altera's software CAD tool, Quartus Prime.
We build IP cores to enable the use of a high speed NoC used to communicate between core fabric and peripheral components such as memory. These IP cores provide configurable access to the high-speed, high-bandwidth interconnect that is used by most customers that require some form of packet processing, storage or buffering, and thus, these IP cores become a critical component of most electronic systems.
As an IP Design Engineer-Intern, you will work with a team of engineers to develop and verify state-of-the-art NoC-based IP cores. You will be working on advanced device architectures, design definition, implementation, and verification. You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation.
Your specific responsibilities will include, but are not limited to the following:
- Architecture and Design based on specifications for NoC IP RTL development
- Device support and CAD tool integration
- Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)
- New product release and rollout support
- Customer technical support
The Candidate Should Possess The Following Behavioral Traits
- Strong skills in communication, initiative, innovation, and teamwork
- Highly motivated to learn and adapt to fast-changing technologies and environments
- Excellent problem-solving skills and attention to detail
- Demonstrate fundamental values such as accountability, integrity, and a winning mindset
- Collaborative mindset, strong influencing skills, and a willingness to work across geographical locations.
Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the positionโs location, as well as the candidateโs experience, skills, training, and job-specific knowledge.
Estimated Salary Range: $90,000 - $95,000 CAD We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.
Qualifications You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- The candidate must be pursuing a Bachelorโs Degree in Computer Engineering, Engineering Science, Computer Science, Math, Electrical Engineering or equivalent.
- 3+ months of experience in Digital logic hardware (e.g. SystemVerilog, Verilog and/or VHDL) design or verification.
- 3+ months of experience in Software programming or scripting (e.g. C/C++ and/or Python).
Preferred Qualifications
- Familiarity with FPGA development flows and tools such as Quartus.
- Experience working on hardware-software co-design or embedded systems projects.
- Strong analytical and problem-solving skills.
Job Type Student / Intern (Fixed Term)
Shift Shift 1 (Canada)
Primary Location: Toronto, Ontario, Canada
Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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